1. Field Of The Invention
The present invention relates to electronic circuits and to circuits which may be integrated on a single piece of material to form an integrated circuit. More specifically, the present invention relates to circuits for performing linear conversion between voltages and currents.
2. The Prior Art
There are known circuits in the prior art which use CMOS transistors to convert voltage to current in a linear fashion. Much work has been done using CMOS transistors in their ohmic region. For example, the paper y. Tsividis, M. Banu, J. Khoury, "Continuous Time MOSFET-C Filters in VLSI, IEEE Trans. on Circuits and Systems", Vol. CAS-33, pp. 125-140 (1986), describes use of multiple transistors to cancel the non-linearity of transistors while they are operating in their ohmic region. The circuits described draw current from the input node. Also, because transistors are used in their ohmic regime, the input voltage range of the circuits is limited. The circuits described therein can also be used as linear continuous time multipliers.
There has also been work using CMOS transistors in saturation for the conversion of voltage to current. The work describes use of a special process to generate depletion mode devices. This work is discussed in the paper P. A. Shoemaker, I. Lagnado, R Shimabukuro, "Artificial Neural Network Implementations with Floating Gate MOS Devices", from the proceedings "Hardware Implementations of Neural Nets and Synapses", NSF/ONR Workshop, P. Mueller, ed. The same research group published further work on adaptation of the circuits: R. L. Shimabukuro, R. E. Reedy. G. A. Garcia. "Dual Polarity Nonvolatile MOS Analog Memory (MAM) Cell for Neural-Type Circuitry", Electronics Letters, Vol. 24, No. 19, pp. 1231-1232, Sep. 15, 1988.
No work is known to the inventors involving the use of saturated MOS transistors in linear voltage/current and conversion circuits which do not draw input current which can be fabricated using a conventional CMOS process.